Shaft Encoder Counter Interface Board


SEC-PC USER MANUAL
The SECPC Board

FISCHER COMPUTER SYSTEMS - 445 Bay Street Angwin, California - 94508
Phone:(707) 965-2414 Fax:(707) 965-3687 Sales:(800) 362-8998

©1986, Fischer Computer Systems
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SPECIFICATIONS

Designed for the IBM PC and compatible computers.

Addressing:

I/O mapped. Uses four consecutive ports, switch-selectable.

Programming:

Can be programmed in any high level language that supports IN and OUT operations

Power:

1.75 amp maximum from +5 volt supply.

Counting rate:

Two input transition per microsecond. Input stage has logic to detect rate errors. A count occurs on each state change of the input pair; thus there will be four times as many counts as complete cycles of the input.

Counter size:

Six decimal digits standard, optional 24 bit binary for each of the three counters.
Interlocking logic and holding registers prevent erroneous reading of a counter in transition.

Encoder inputs:

A pair of quadrature-encoded TTL-level signals for each of the three counters.

Switch input:

Debounced and latched input for one single-pole, double-throw switch. Output may be jumpered to an interrupt.

Parallel input:

Eight TTL signals.

Parallel output:

Eight LSTTL outputs.

Other outputs:

Four LED drivers.

ROM/RAM space:

A socket for 2716/2732 ROM or 6116 RAM is provided. The data in the ROM or RAM is read and written through an I/O port. This gives the user a known place to store either temporary or permanent information.

Connector:

A fifty pin 'D' style connector is used. The mating connector and hood is provided with the SEC-PC.


LIMITED WARRANTY

Fischer Computer Systems guarantees this product to be free of defects in parts and workmanship for a period of one year from the date of purchase, limited to repair or replacement of the product when returned with transportation charges prepaid by customer and accompanied by a statement of the problem. This warranty does not apply to defects arising from misuse, accident,or customer modification.


INSTALLATION

CONFIGURATION

Set the device port address with the switches at location U2 at the top of the board. To use the standard address of 816 (330 hex) set the top two switches OFF, the next two ON, the next two OFF, and the bottom two ON.To use some other address, express the number in binary, discard the two least significant bits, and set the remaining eight bits in the switches. The most significant bit, A9, goes in the bottom switch, SW8, with the rest in order. Set each switch ON for a one, OFF for a zero.

Determine whether an interrupt is to be used. If so, install a jumper to the desired interrupt line. The jumper area "INT" has the center column of pins bussed together and driven by the driver on the board. The left column of pins goes to inter-rupt levels IRQ3, 4, and 5 (top to bottom), while the right column of pins goes to interrupt levels IRQ7, 6, and 2. In general, an application where the board is programmed in a higher level language will not use interrupts and will omit the jumper.

Select any available full-length expansion slot in your computer, and install the SEC-PC there (with the power off, of course). Secure the board to the rear frame with the machine screw obtained when removing the previous board or blank panel.

CABLING

A single fifty pin 'D' style connector is used for all signals to and from the board. Refer to the following page for a pinout diagram. If possible, dress the switch and encoder inputs away from the parallel port cabling. Use the grounds liberally, both as shielding and to provide a low impedance path from the encoders.

Each encoder input is an A,B signal pair. The A and B designations are arbitrary and may be reversed to change the direction of counting. Refer to the 'HINTS' section for some suggestions on grounding.

Each LED is driven in its own current loop. The anode goes to one of the 'Return' points and the cathode goes to the 'LED-n' driver output.

For electrical properties of the parallel input and output ports, refer to a TTL data book for 74LS241 and 74LS373 parts. Note specifically the current limitations of the outputs, and that the states of unconnected inputs cannot be guaranteed.

The following table gives pin numbers for the DB-50 connector as viewed from the rear of the computer. Pin 1 is at the top and to the viewer's left.

 1. Switch Common				34. +5 volts
 2. Switch NC		18. Switch NO		35. +5 volts
 3. Encoder ZB		19. Encoder ZA		36. +5 volts
 4. Encoder XA		20. Encoder XB		37. Ground
 5. Encoder YA		21. Encoder YB		38. Ground
 6. PO-6		22. PO-7		39. Ground
 7. PO-4		23. PO-5		40. Ground
 8. PO-0		24. PO-3		41. Ground
 9. PO-2		25. PO-1		42. Ground
 10. LED-4		26. Return		43. Ground
 11. LED-6		27. Return		44. Ground
 12. LED-3		28. Return		45. Ground
 13. LED-5 		29. Return		46. Ground
 14. PI-4		30. PI-6		47. Ground
 15. PI-1		31. PI-7		48. Ground
 16. PI-3		32. PI-5		49. Ground
 17. PI-2		33. PI-0		50. Ground


USING THE BOARD

AN EXAMPLE

Consider the case of an operator at a digitizing table equipped with a cursor and a pushbutton. A data collection operation might have the following parts:

  1. Setup. The operator inputs information identifying the job and the scale of the drawing, either via a keyboard or via the parallel input port.
  2. Reference. The program requests the operator to position the cursor to a reference point and push the button. When the program senses the button it clears the counters.
  3. Data acceptance. At each subsequent push of the button, the counters are copied to holding registers and read into the computer, where the values are multiplied by a scale factor and written to an array or file.
  4. Display. The program might be written to read the counters in its spare time and display any changed values on a console screen.
  5. End. There must be some provision to end the job. There are several possibilities: keyboard input, parallel port input, a fixed number of points, or an otherwise unlikely data value.


OPERATIONAL DESCRIPTION

The SEC-PC board accepts inputs from three TTL-output quadrature encoders and monitors state changes on those inputs. The board is a bus slave and has no data transfer (DMA) logic.

The board contains three up-down counters named X, Y, and Z. Each counter has six decimal digits for a maximum count of 999,999. (See 'BINARY OPTION', below.) The three input stages accept quadrature signals from the encoders.
Counting occurs on each of the four state changes of the input pairs. Therefore an encoder with 1000 cycles per revolution will produce 4000 counts per revolution. Rate error logic detects double state changes on the inputs.
There is an 18 digit register into which the counters are copied for reading.
A command from the program copies all the counters simultaneously. Interlocking logic insures that this transfer is made at a time when the counters are not in transition. The program reads the three values from the holding register a digit at a time, most significant digit first.

An input for an operator's switch, intended to mark data points to be recorded, is debounced and latched as 'FLAG', but has no effect on the counters. FLAG may be jumpered to cause an interrupt, or may be polled by the applications program. There are four LED drivers intended for feedback to the operator. For 'click' feedback a small speaker can be substituted for one LED.

PROGRAMMING

Programming the shaft encoder counter board is done through four I/O ports. The control port, 'C', has a standard value of 816 (330 hex, 1460 octal), but may be any value that is evenly divisible by four. Address selection is done using switches at location U2 with the top switch matching A2 and the bottom one matching A9.

All programmed communication with the SEC board is done with the following four OUT and four IN commands.

 IN C Read Status/Data
 D7: Switch Flag when status, zero when data
 D6: Error Flag when status, zero when data
 D5: Always zero
 D4: Always zero
 D3: BCD number when data, one when status
 D2: BCD number when data, one when status
 D1: BCD number when data, one when status
 D0: BCD number when data, one when status

 IN C+1 Read Parallel Input Port

 IN C+2 Read RAM/ROM

 IN C+3 Clear Flag (read all ones)

 OUT C Write Synchronized Output Port
 D0=0: Clear counters and command register
 D0=1: Copy counters to holding register

 OUT C+1 Write Parallel Output Port

 OUT C+2 Write RAM

 OUT C+3 Write Command Register
 D7: Interrupt ENABLE 
 D6: LED 6
 D5: LED 5
 D4: LED 4
 D3: LED 3
 D2: (reserved)
 D1,0 Channel Select
 1,1 = Z
 1,0 = Y
 0,1 = X
 0,0 = Status

An internal pointer is used for data and ROM accesses. This pointer is cleared to zero by any write to the command register and is incremented by data reads (left to right) and by RAM/ROM accesses.

EXAMPLES

The following two pages offer some rudimentary programming examples, the first in AT&T GW-BASIC and the second in Microsoft C. Both are tested programs that simply read the counters and type the values on the console. The following basic program was written for DECIMAL counters ONLY!

10 REM EXAMPLE IN AT&T GW-BASIC
20 REM
30 DIM X$(6),Y$(6),Z$(6)
40 C=816 : P=C+3 : REM DEFINE PORTS
50 X=1: Y=2: Z=3 : REM DEFINE COUNTERS
60 S1=1:S2=1:S3=1: REM SCALE FACTORS
70 O1=0:O2=0:O3=0: REM AXIS OFFSETS
80 PRINT TAB(25),"SEC-PC BOARD DEMO"
90 PRINT : PRINT
100 INPUT "PRESS 'RETURN' WHEN CURSOR IS OVER REFERENCE",J$
110 PRINT "THANKS."
115 PRINT "PRESS DIGITIZER BUTTON TO DIGITIZE, BREAK TO EXIT":PRINT
120 OUT C,0 :REM CLEAR COUNTERS, RATE ERROR FLIP-FLOP
130 REM
140 REM MAIN LOOP
150 J=INP(P) :REM CLEAR SWITCH FLAG
155 OUT P,0 :REM SELECT STATUS
160 REM WAIT FOR OPERATOR SWITCH
170 IF INP(C)<128 THEN GOTO 170
180 OUT C,1 :REM COPY TO HOLDING REGISTER
190 IF INP(C)>191 THEN GOTO 340
200 OUT P,X
205 X$=""
210 FOR I=1 TO 6: X$ = X$ + CHR$(INP(C)+48) : NEXT I
220 OUT P,Y
225 Y$=""
230 FOR I=1 TO 6: Y$ = Y$ + CHR$(INP(C)+48) : NEXT I
240 OUT P,Z
245 Z$=""
250 FOR I=1 TO 6: Z$ = Z$ + CHR$(INP(C)+48) : NEXT I
260 REM CONVERT STRINGS TO NUMBERS, CHECK MINUS, SCALE, OFFSET
270 X1=VAL(X$): IF X1>7E5 THEN X1=X1-1E6
275 X2=S1*X1+O1
280 Y1=VAL(Y$): IF Y1>7E5 THEN Y1=Y1-1E6
285 Y2=S2*Y1+O2
290 Z1=VAL(Z$): IF Z1>9E5 THEN Z1=Z1-1E6
295 Z2=S3*Z1+O3
300 N=N+1
310 PRINT "DATA POINT";N;
320 PRINT TAB(20);"X=";X2;TAB(35);"Y=";Y2;TAB(50);"Z=";Z2
330 GOTO 150
340 PRINT "***THERE HAS BEEN A RATE ERROR***"
350 STOP

/* EXAMPLE IN MICROSOFT C */

#define PORT 0x330 /* base of the 4 ports */
#define RADIX 16 /* for binary counters */
#define FLAG (inp(PORT) & 0x80) /* test for switch flag */

main()
 {
 long x,y,z,rctr();
 int i;
 outp(PORT,0); /* clear the counters */
 outp(PORT+3,0); /* select status */
 if(inp(PORT) & 0x30) /* (bits should be zero) */
 {
 printf("No board found at port %x\n",PORT);
 exit(1);
 }
 puts("Please press digitizing switch ten times.");
 for(i=0; i<10; i++) /* main loop: read & display */
 {
 inp(PORT+3); /* clear flag */
 outp(PORT+3,0); /* select status */
 while(!FLAG)
 ; /* hang waiting for switch */
 if(inp(PORT) & 0x40)
 {
 printf("***THERE HAS BEEN A RATE ERROR***\n");
 exit(1);
 }
 outp(PORT,1); /* copy to holding reg */
 inp(PORT+3); /* clear flag */
 x = rctr(1);
 y = rctr(2);
 z = rctr(3);
 printf("Data point %2d: x=%8ld, y=%8ld, z=%8ld\n",
 i,x,y,z);
 }
 printf("Ten values read, all done\n");
 }

long rctr(c) /* read one counter */
int c;
 {
 long v;
 outp(PORT+3,c); /* select a counter */
 v = inp(PORT);
 v = v*RADIX + inp(PORT);
 v = v*RADIX + inp(PORT);
 v = v*RADIX + inp(PORT);
 v = v*RADIX + inp(PORT);
 v = v*RADIX + inp(PORT);
 return(v);
 }

HINTS AND CAUTIONS

GROUNDING

Inadequate grounding can produce rate error indications through noisy input signals. The connectors are laid out for flat cable with every third conductor a ground. These grounds should be connected at both ends to keep impedance low and for best shielding. In addition, it is important that the power supply ground go to the encoder independently of the signal ground. If this is not the case, the voltage drop in the shared length of ground will subtract from the TTL noise margin.

ZERO DETECT

Encoder zero detect outputs may be wired to the parallel input port and sensed in software. To establish the reference, the software waits for the zero detect signal, reads the corresponding counter, saves the reading, and subtracts it from all subsequent readings. The accuracy of this method depends both on the width of the zero detect signal and on the input rate. Recall that the counters count on all four state changes of each cycle of the quadrature input. If the zero detect pulse is, for instance, three states wide, the reference when approached from the left will differ by two counts from that when approached from the right. If the inputs change state faster that the software can respond, the reference will differ by the number of intervening counts. This consideration may suggest the use of a machine language subroutine for zero detect.

OPERATOR SWITCH

The input from the operator's switch goes to circuitry that ensures that the FLAG bit is set only once even if the switch bounces multiple times. Both the normally-open and normally-closed contacts must be connected for this circuit to work.

ASCII INPUT

The board encodes each decimal digit as BCD when sending it to the computer (in contrast with the older S-100 model which encoded the digits in ASCII). If the programmer wishes to store the digits as a text string, the ASCII code for '0' (30 hex or 48 decimal) can be added to each digit (in software) as it is input.

BINARY OPTION

This option replaces the eighteen decimal counter chips with eighteen binary counter chips. The maximum count in each of the three registers is extended from 999,999 to 16,777,215. Software should be written with the radix as a parameter.

INTERRUPTS

Interrupts on the bus of the IBM PC are inexplicably high-true. This means that undriven lines are seen as true and must be masked at the 8259 interrupt controller. It also precludes 'wired-or' logic, and two devices may share a line only if they are never both enabled at once.
Therefore, the ENABLE bit in the SEC-PC 'connects' the FLAG bit, through a driver, and through a jumper, to the bus. The jumper allows the user to select one of the six interrupt levels +IRQ2 through +IRQ7. Once asserted on the bus, the interrupt controller at the processor must be enabled for that level before it will be seen.

The interrupt service routine should be written to copy the counters to the holding register, input the data, clear the FLAG bit, and exit. Applications not using interrupts may safely ignore the ENABLE bit if no interrupt jumper is installed.